We believe that learning in computer science and engineering should reflect the current state of the field, as well as introduce the principles that are shaping computing. We also feel that readers in every specialty of computing need to appreciate the organizational paradigms that determine the capabilities, Performance, and, ultimately, the success of computer systems.
　　Modern computer technology requires professionals of every computing specialty to understand both hardware and software. The interaction between hardware and software at a variety of levels also offers a framework for understanding the fundamentals of computing. Whether your Primary interest is computer science or electrical engineering, the central ideas in computer organization and design are the same. Thus, our emphasis in this book is to show the relationship between hardware and software and to focus on the concepts that are the basis for current computers.

David A. Patterson has been teaching computer architecture at the University of Califonia, Berkeley, since joining the faculty in l977, and the holds the Pardee Chair of Computer Science. Past chair of the CS division in the EECS department at Berkeley and the ACM SIG in computer architecture, he is currently chair of the Computing Research Association. His teaching has been honored by the ACM, the IEEE, and the University of California. Patterson has also received the IEEE Technical Achievement Award and the Outstanding Alumnus Award of the UCLA Computer Science Department. He is a member of the Natioal Academy of Engineering and is a fellow of both the ACM the IEEE.
　　At Berkeley Patterson led the design and implementation of RISC I, likely the first VLSI Reduced Instruction Set Computer. This research became the foundation of the SPARC, architecture, currently used by Fujitsu, Sun Microsystems, and Xerox. He was also a leader of the Redundant Arrays of Inexpensive Disks (RAID) project, which led to highperformance storage systems from many companies. These projects earned three distinguished dissertation awards from the ACM. His current research interests are in building novel microprocessors using Intelligen DRAM (IRAM).
　　John L. Hennessy teaches computer architecture at Stanford University, where he has been a member of the faculty since l997. He is currently Dean Of the School of Engineering and the Frederick Emmons Terman Professor of Engineering. Hennessy is a fellow of the IEEE and ACM,a member of the National Academy of Engineering, and a fellow of the American Academy Of Arts and Sciences. He received the l994 IEEE there Award for his contributions to the development of RISC technology.
　　Hennessy's original research group at Sanford developed many of the techniques now in commercial use for optimizing compilers. In l98l, he started the MIPS Proect at Stanford with a handful of gradate students. After competing the Project in l984, he took a one-year leave from the university to co-found MIPS Computer Systems, which developed one of the first commercial RISC microprocessors. MIPS Computer Systems has since merged with Silicon Graphics, where Hennessy consults as Chief Architect. His recent research at Stanford focuses on the area of designing and exploiting multiprocessors. Most recently, he has been involved in the development of the DASH multiprocessor architecture, one of the first distributed shared-memory multiprocessors.

Changes for the Second Edition
　　We had six major goals for the second edition: tie the ideas from the book more closely to the rea1 world; enhance how well the book works for beginners: extend the book material using the World Wide Web; improve quality;improve pedagogy; and finally update the technical content to refied changes in the industry since the publication of the first edition in 1994--the conventional reason for a new edition.
　　First, to make the examples in the book even more concrete and connected with the real world, in each chapter we explained how the ideas were realized in the latest microprocessors from Intel or from IBM/Motorola. Hence you can learn how the mechanisms discussed are used in the computer on your desktop. Each chapter has a new section called "Rea1 Stuff" that ties the ideas you read about to the machine you probably use everyday.
　　Second. we wanted the book to work better for readers interested in an overview of computer organization. Each chapter now has a list of the key for discussed in the chapter, and we added a glossary of more than 300 definitions. We also rely on ana1ogies from everyday life to explain subtleties of computers.
　　commercial airplanes to show how performance differs if measured as hand width or latency the stealth of spies to explain procedure invocation and nesting plumbing to show how carry-lookahead logic works the laundry room to explain pipeline execution and hazards a desk in a library to demonstrate principles of memory hierarchy the management overhead as committees grow to iliustrate the difficulty of achieving high performance in larg-scale multiprocessors
　　More specifically, we added more assembly 1anguage programming examp1es and more explanation in each example to help the beginner understand assembly language programming in Chapters 3 and 4. We also added an introductory section to the pipelining chapter (Chapter 6) that allows understanding of the important ideas and issues in pipeline design without having to deive into the details of a pipelined datapath and control.
　　Our third goal was to go bryond the limiations of a printed book by adding descriptions and links on the World Wide Web. Throughout this book, you will often see the "Web Enhanced" icon shown at the left Wherever this icon appears, you can go to http://www.mkp.com/cod2e.htm to find materials related to the text,The WWW lets us give examples of recent, relevant machines so that you can see the latest versions of the ideas in the book For example, we've added a new online appendix (Web Extension I) comparing RISC architectures. Other examples include links for specific references in the book to other sites; instructions on how to use PCspun, the new DOS and Windows versions of the SPIM simulator, as well as links to all the versions of SPIM; access to all the figures from the book; lecture slides; links to instructors' home pages; and an online Instructors Manual. We also included some appendices from the first edition(Web Extensions II and III) that you may find valuable. We intend to update these pages periodically to make new and better links.
　　Fourth, we wanted to significantly reduce the flaws that creep into a book during the revision process. The first edition of the book used beta testing to see which ideas worked well and which did not, and we were very happy with the improvements as a result. We did the same with the second edition. To further reduce the chances of bugs in the book we gave ourselves a longer development cycle and involved many more computer architects its preparation First, Tod Amon completely revised all exercises, in part based on suggestions of exercises by a dozen instructors. The book now has 30% new exercises and another 30% that have been reworked for a total of 400. We believe that they are much more clearly worded than before and that there is sufficient variety for a broader group of students. second, Kent Wilken carefully read the beta edition, suggesting hundreds of improvements. After we revised　the beta edition, George Adams gave another very careful read of our revision, again making hundreds of useful suggestions. Finally, we reviewed the copyedit and read the page proof to try to catch mistakes that can creep in during the book production process. Although we are sure there must still be bugs for which you can get rewards. we believe this edition is far cleaner than the first.
　　The fifth goal was to improve the exposition of the ideas in the book, based on difficulties mentioned by readers of the first edition. We expanded the section of Chapter 3 explaining procedures, showing the procedure infrastructure in a longer sequence of examples. Chapter 4 has a longer description of carry lookahead and carry save adders. We simplified the explanation of the multicycle datapath in Chapter 5 by adding several registers. Chapter 6 actually got a good deal shorter by adding an overview section, since it allowed us to reduce the number of examples in the detai1ed pipelining sections. We also made numerous changes in the pipeline diagrams to make them easier to understand and more consistent, Chapter 7 was reorganized to put all caches together before moving to virtua1 memory and then translation buffers, coming back to the commonalities at the end. We also changed the emphasis from virtual memory as simply another level of the hierarchy to the hardware enforcer of protection. Chapter 8 was refocused to be more quantitative and design oriented. Chapter 9 was completely rewritten and retitled, reflecting the dramatic change in the parallel processing industry since 1994.
　　Finally, in the inierval since the first edition of this book, a computer has run a program at the rate of 1 teraFLOPS-a tri11ion floating-point operations per second or a million floating-point operations per microsecond, another computer has p1ayed better chess than the best human being, and the whole world is more closely connected thanks to the World Wied. Web. These events occurred in part becuse computer designers have first improved performance of a sing1e computer by a factor of 100 in the last 10 years and then harnessed together many of them to achieve even greater performance. We have inc1uded descriptions of new ideas that helped make these miracles occur, such as branch prediction and out-of-order execution in chapter 6, multilevel and nonblocking caches in Chapter 7, switched networks and new buses in Chapter 8, and nonuniform-memory-access, shared-memory multiprocessors and clusters in Chapter 9.

1　Computer Abstractions and Technology
1.1　Introduction
1.2　Below Your Program
1.3　Under the Covers
1.4　Integrated Circuits:Fueling Innovation
1.5　Real Stuff:Manufacturing Pentium Chips
1.6　Fallacies and Pitfalls
1.7　Concluding Remarks
1.8　Historical Perspective and Further Reading
1.9　Key Terms
1.10　Exercises
2　The Role of Performance
2.1　Introduction
2.2　Measuring Performance
2.3　Relating the Metrics
2.4　Choosing Programs to Evaluate Performance
2.5　Comparing and Summarizing Performance
2.6　Real Stuff:The SPEC95 Benchmarks and Performance of Recent Processors
2.7　Fallacies and Pitfalls
2.8　Concluding Remarks
2.9　Historical Perspective and Further Reading
2.10　Key Terms
2.11　Exercises
3　Instructions:Language of the Machine
3.1　Introduction
3.2　Operations of the Computer Hardware
3.3　Operands of the Computer Hardware
3.4　Representing Instructions in the Computer
3.5　Instructions for Making Decisions
3.6　Supporting Procedures in Computer Hardware
3.7　Beyond Numbers
3.8　Other Styles of MIPS Addressing
3.9　Starting a Program
3.10　An Example to Put It All Together
3.11　Arrays versus Pointers
3.12　Real Stuff: PowerPC and 80x86 Instructions
3.13　Fallacies and Pitfalls
3.14　Concluding Remarks
3.15　Historical Perspective and Further Reading
3.16　Key Terms
3.17　Exercises
4　Arithmetic for Computers
4.1　Introduction
4.2　Signed and Unsigned Numbers
4.3　Addition and Subtraction
4.4　Logical Operations
4.5　Constructing an Arithmetic Logic Unit
4.6　Multiplication
4.7　Division
4.8　Floating Point
4.9　Real Stuff: Floating Point in the PowerPC and SOx86
4.10　Fallacies and Pitfalls
4.11　Concluding Remarks
4.12　Historical Perspective and Further Reading
4.13　Key Terms
4.14　Exercises
5　The Processor: Datapath and Control
5.1　Introduction
5.2　Building a Datapath
5.3　A Simple Implementation Scheme
5.4　A Multicycle Implementation
5.5　Microprogramming:Simplifying Control Design
5.6　Exceptions
5.7　Real Stuff:The Pentium Pro Implementation
5.8　Fallacies and Pitfalls
5.9　Concluding Remarks
5.10　Historical Perspective and Further Reading
5.11　Key Terms
5.12　Exercises
6　Enhancing Performance with Pipelinling
6.1　An Overview of Pipelining
6.2　A Pipelined Datapath
6.3　Pipelined Control
6.4　Data Hazards and Forwarding
6.5　Data Hazards and Stalls
6.6　Branch Hazards
6.7　Exceptions
6.8　Superscalar and Dynamic Pipelining
6.9　Real Stuff: PowerPC 604 and Pentium Pro Pipelines
6.10　Fallacies and Pitfalls
6.11　Concluding Remarks
6.12　Historical Perspective and Further Reading
6.13　Key Terms
6.14　Exercises
7　Large and Fast:Exploiting Memory Hierarchy
7.1　Introduction
7.2　The Basics of Caches
7.3　Measuring and Improving Cache Performance
7.4　Virtual Memory
7.5　A Common Framework for Memory Hierarchies
7.6　Real Stuff:The Pentium Pro and PowerPC 604 Memory Hierarchies
7.7　Fallacies and Pitfalls
7.8　Concluding Remarks
7.9　Historical Perspective and Further Reading
7.10　Key Terms
7.11　Exercises
8　Interfacing Processors and Peripherals
8.1　Introduction
8.2　I/O Performance Measures:Some Examples from Disk and File Systems
8.3　Types and Characteristics of I/O Devices
8.4　Buses:Connecting I/O Devices to Processor and Memory
8.5　Interfacing I/O Devices to the Memory, Processor, and Operating System
8.6　Designing an I/O System
8.7　Real Stuff: A Typical Desktop I/O System
8.8　Fallacies and Pitfalls
8.9　Concluding Remarks
8.10　Historical Perspective and Further Reading
8.11　Key Terms
8.12　Exercises
9　Multiprocessors
9.1　Introduction
9.2　Programming Multiprocessors
9.3　Multiprocessors Connected by a Single Bus
9.4　Multiprocessors Connected by a Network
9.5　Clusters
9.6　Network Topologies
9.7　Real Stuff: Future Directions for Multiprocessors
9.8　Fallacies and Pitfalls
9.9　Concluding Remarks-Evolution versus Revolution In Computer Architecture
9.10　Historical Perspective and Further Reading
9.11　Key Terms
9.12　Exercises
APPENDICES
A　Assemblers, Linkers, and the SPIM Simulator
A.1　Introduction
A.2　Assemblers
A.3　Linkers
A.4　Loading
A.5　Memory Usage
A.6　Procedure Call Convention
A.7　Exceptions and Interrupts
A.8　Input and Output
A.9　SPIM
A.10　MIPS R2000 Assembly Language
A.11　Concluding Remarks
A.12　Key Terms
A.13　Exercises
B　The Basics of Logic Design
B.1　Introduction
B.2　Gates, Turth Tables, and Logic Equation
B.3　Combinational Logic
B.4　Clocks
B.5　Memory Elements
B.6　Flnite State Machines
B.7 Timing Methodologles
B.8　Concluding Remarks
B.9　Key Terms
B.10　Exercises
C　Mapping Control to Hardware
C.1　Introduction
C.2　Implementing Combinational Control Units
C.3　Implementing Finite State Machine Control
C.4　Implementing the Next-State Function with a Sequencer
C.5　Translating a Microprogram to Hardware
C.6　Concluding Remarks
C.7　Key Terms
C.8　Exercises
Glossary
Index

by John H. Crawford
　　Intel Feilow, Director of Microprocessor Architecture
　　Intel Corporation, Santa Clara, California
　　Computer design is an exciting and competitive discipline. The microprocessor industry is on a treadmill where we double microprocessor performance every 18 months and double microprocessor complexity-measured by the number of transistors per chip-every 24 months. This unprecedented rate of change has been evident for the entire 25-year history of the microprocessor,and it promises to continue for many years to come as the creativity and energy of many people are harnessed to drive innovation ahead in spite of the challenge of ever-smaller dimensions. This book trains the student with the concepts needed to lay a solid foundation for joining this exciting field. More importantly, this book provides a framework for thinking about computer organization and design that will enable the reader to continue the lifetime of learning necessary for staying at the forefront of this competitive discipline.
　　The text focuses on the boundary between hardware and software and explores the levels of hardware in the vicinity of this boundary. This boundary is captured in a computer's architchre specification. It is a critical boundary for a successful computer product: an architerts must define an interface that can be efficiently implemented by hardware and efficiently targeted by compilers. The interface must be able to retain these efficiencies for many generations of hardware and compiler technology, much of which will be unknown at the time the architecture is specie. This boundary is central to the discipline of computer design: it is where compilation (in software) ends and interpretation (in hardware) begins.
　　This book builds on introductory programming skills to introduce the concepts of assembly language programming and the tools needed for this task: the assembler, linker and loader. Once these prerequisites are completed, the
remainder of the book explores the first few levels of hardware below the architectural interface. The basic concepts are motivated and introduced with clear and intuitive examples, then elaborated into the "real stuff' used in today's modern microprocessors. For example, doing the laundry is used as an analogy in Chapter 6 to explain the basic concepts of pipelining, a key technique used in all modern computers. In Chapter 4, algorithms for the basic floating-point arithmetic operators such as Addison, multiplication, and division are first explained in decimal then in binary and finally they are elbow-,rated into the best-known methods used for high-speed arithmetic in today's
computers.
　　New to this edition are edition in each chapter entitled "Real Stuff" These sections describe how the concepts from the chapter are implemented in commercially successful products. These provide relevant, tangible examples of the concepts and reinforce their importance. As an example, the Real Stuff in Chapter 6, Enhancing Performance with Pipelining, provides an overview of a dynamically scheduled pipeline as implemented in both the IBM/Motorola PowerPC 604 and Intel's Pentium Pro microprocessor.
　　The history of computing is woven as a thread throughout the book to reward the reader with a glimpse of key successes from the brief history of this young discipline. The other side of history is reported in the Fallacies and Pitfalls section of each chapter. Since we can learn more from failure than from success, these sections provide a wealth of learning!
　　The authors are two of the most admired teachers, researchers, and practitioners of the art of computer design today. John Hennessy has straddled both sides of the hardware/software boundary, Providing technical leadership for the legendary MIPS compiler as well as the MIPS hardware products through many generations. David Patterson was one of the orighal RISC proponents:he coined the acronym RISC, evangelized the case for RISC, and served as a key consultant on Sun Microsystem's SPAR line of processors. Continuing his talent for marketable acronyms, his next breakthrough was RAID (Redundant Arrays of Inexpensive Disks), Which revolutionized the disk storage industry for large data Servers and then NOW (Networks of Worksations).
　　Like other great ''software" products, this second edition went through an extensive beta testing program: l3 beta sites tested the draft manuscript in classes to "debug" the text. Changes from this testing have been incorporated into the "production" version.
　　Patterson and Hennessy have succeeded in taking the first edition of their excellent introductory textbook on computer design and making it even better. This edition retains all of the good points of the original, yet adds significant new content and some minor enhancements. What results is an outstanding introduction to the exciting field of computer design.

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